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Testing Solutions

When a fabricated IC fails, probably it has undergone a fault in one of the following stages.

  • Faulty calibration
  • Test was wrong because of wrong test fixtures.
  • Faulty design methodology
  • Fault in system specifications provided.

Role of testing is to identify the fault, and the process of correcting the fault is diagnosis. Primary goal of a designer is to meet all the performance characteristics or specifications defined by the client. Determining the technology yield is important for IC design as it directly impacts on product cost. Gauging DUT for its performance and finding the technology yield are the main advantages of testing.

RFIC Solutions has good experience in RFIC testing and following are different testing domains on which we have expertise on.

Wafer level Test solutions: As we have worked on high frequency design and testing, we are aware of wafer level testing methodology and design aspects which have to be taken care during IC chip design for successful testing. Proper IC chip modeling will minimize the challenges that will arise during IC Testing. Such as,

  • Layout disciplines to be followed.
  • Pitch and bond pad placement convenient for testing
  • RF and DC bond pad orientation and separation etc.

Chip on Board: Any chip designed will be deployed upon a board (PCB). Designing Test boards with proper test fixtures to mitigate all possible losses is a challenge. Designing a chip on board is itself is a challenge as it involve large number of control pins, as we are testing a system now. Considering cable loss and all path losses are very important. A faulty calibration will always lead to wrong testing/results. Some of the challenges that we have to take care are as follows.

  • Temperature/Thermal issues
  • Sinking and sourcing issues
  • Proper pin excitation for testing etc.


Built- it Testing: To meet high reliability and lesser diagnose time Built-in Test is preferred. The main purpose of BIST is to reduce the complexity, and thereby decrease the cost and reduce reliance upon ATE. Built-in Test reduces cost in two ways  1) decreases test-cycle duration  2) reduces the complexity of the test/probe setup, by reducing the number of I/O signals that must be driven/examined under tester control. Test Chips with additional built-in test flexibility is always an advantage in IC Design. Certain built-in test capability involve in IC design are as follows.

  • Adding a signal strength indicator/Power sensor at critical nodes in IC’s.
  • Adding built-in design as temperature sensor in IC’s.
  • Power boot up to find out any short/open in circuit etc.

Failure analysis: Failure Analysis plays an important role in any electronic system design. Evaluating the cause for certain design flaws in design and taking measures’ to minimize them is critical in any electronic product development. Certain design irregularities that can occur in IC design can be as follows,

  • Less gain
  • System go unstable in measurement
  • Positive return losses etc.

Factors which can cause these irregularities are improper layout discipline, hidden source resistance, coupling, no proper DC and RF isolations etc, which and may have to be addressed carefully.